CXL 4.0 doubled its link rate and introduced bundled ports
The CXL Consortium released CXL 4.0 on November 18, 2025, doubling the link rate to 128 GT/s and adding bundled ports, retimer reach and memory RAS work.
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The CXL Consortium released CXL 4.0 on November 18, 2025, doubling the link rate to 128 GT/s and adding bundled ports, retimer reach and memory RAS work.
Read analysisThe UCIe Consortium released UCIe 3.0 on August 5, 2025, adding 48 and 64 GT/s options, runtime recalibration and manageability detail for package links.
Read analysisPCI-SIG released PCIe 7.0 to members on June 11, 2025, setting a 128 GT/s transfer rate while keeping the full specification behind member access.
Read analysisNVIDIA introduced NVLink Fusion on May 18, 2025, describing a route for partner ASICs and CPUs to join an NVLink-based rack-scale AI infrastructure design.
Read analysisLightmatter unveiled Passage M1000 on March 31, 2025, describing a 3D photonic-interposer reference platform for AI XPUs and switches with stated 114-Tbps optical bandwidth.
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